Simone Romeo. ARISE: Integration of an Approximate and Reconfigurable Spatial Array on a RISC-V-Based Platform. Rel. Maurizio Martina, Guido Masera, Michele Caon, Emanuele Valpreda, Flavia Guella. Politecnico di Torino, Master of science program in Electronic Engineering, 2024

Ivan Biundo. Integration of LEN5, a RISC-V Out-of-Order Microprocessor, Inside a Low-Power, Heterogeneous System on Chip. Rel. Maurizio Martina, Guido Masera, Michele Caon, Mattia Mirigaldi. Politecnico di Torino, Master of science program in Electronic Engineering, 2024

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Marco Rosa Gobbo. Design of a Coverage-driven Reinforcement Learning Framework for RISC-V Functional Verification. Rel. Mariagrazia Graziano, Andrea Marchesin, Michele Caon, Maurizio Martina. Politecnico di Torino, Master of science program in Computer Engineering, 2024

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Alessio Caviglia. Lightweight Vector Extension for Efficient Neural Network Inference on RISC-V. Rel. Maurizio Martina, Guido Masera, Michele Caon, Emanuele Valpreda, Flavia Guella. Politecnico di Torino, Master of science program in Computer Engineering, 2024

Flavia Guella. HERMIONE: a Co-design Methodology for Layer-wise Approximation of Neural Networks on RISC-V. Rel. Maurizio Martina, Guido Masera, Emanuele Valpreda, Michele Caon. Politecnico di Torino, Master of science program in Electronic Engineering, 2023

Francesca Sica. Design of an edge-oriented vector accelerator based on RISC-V "V" extension. Rel. Guido Masera, Maurizio Martina, Michele Caon, Walid Walid. Politecnico di Torino, Master of science program in Electronic Engineering, 2022

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