Alessio Caviglia
Lightweight Vector Extension for Efficient Neural Network Inference on RISC-V.
Rel. Maurizio Martina, Guido Masera, Michele Caon, Emanuele Valpreda, Flavia Guella. Politecnico di Torino, Master of science program in Computer Engineering, 2024
Abstract
In recent years, Neural Networks (NNs) have expanded across various domains, including agriculture, wearable devices, and smart cities. This widespread adoption has created a growing need to reduce data transfer bottlenecks, driving increasing efforts towards shifting computation from the cloud to edge devices, which are, however, constrained by power, area, and cost. Vector processors offer a promising solution to the challenges posed by edge computing by balancing performance and resource efficiency. In this work, the CV32E20, a RISC-V scalar core originally designed for embedded applications, is extended with a subset of the RISC-V "V" Vector Extension (RVV) to leverage the benefits of vector processing on data-intensive tasks.
As the primary objective of this work is to improve performance while keeping limited complexity, resource sharing between the vector and the scalar pipeline is maximized
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