13 December 2024

• Mattia Castagno. From minutes to millennia: enhancing power analysis resistance in AES and ASCON. Rel. Guido Masera, Mattia Mirigaldi. Politecnico di Torino, Master of science program in Electronic Engineering, 2024
  

  

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• Ivan Biundo. Integration of LEN5, a RISC-V Out-of-Order Microprocessor, Inside a Low-Power, Heterogeneous System on Chip. Rel. Maurizio Martina, Guido Masera, Michele Caon, Mattia Mirigaldi. Politecnico di Torino, Master of science program in Electronic Engineering, 2024
  

  

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24 October 2025

• Lorenzo Capobianco. Open Hardware, Hidden Risks: Mitigating passive power side-channel leakage in RISC-V microcontrollers. Rel. Guido Masera, Mattia Mirigaldi. Politecnico di Torino, Master of science program in Electronic Engineering, 2025
  

  

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24 July 2026

• Patricia Khalil. Side-Channel Analysis of ASCON Using Deep Learning. Rel. Guido Masera, Mattia Mirigaldi, Alessandro Varaldi, Valeria Piscopo. Politecnico di Torino, Master of science program in Computer Engineering, 2026
  

  

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• Riccardo Maria Galiano. Vector Acceleration of SEAL-Embedded Fully Homomorphic Encryption on RISC-V Embedded Systems. Rel. Maurizio Martina, Guido Masera, Mattia Mirigaldi. Politecnico di Torino, Master of science program in Electronic Engineering, 2026
  

  

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