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Francesca Sica. Design of an edge-oriented vector accelerator based on RISC-V "V" extension. Rel. Guido Masera, Maurizio Martina, Michele Caon, Walid Walid. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2022
Christian Vespo. VLSI architectures optimized for the computation of floating-point transcendental functions. Rel. Maurizio Martina, Guido Masera, Walid Walid. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2023
Pietro Romeo. Design of an optimized FHOG architecture with Vivado HLS. Rel. Maurizio Martina, Walid Walid. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2024