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List of theses with "Du, Boyang as relator"

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Number of items: 2.

29 October 2018

Roascio, Gianluca

Analysis and extension of an open-source VHDL model of a general-purpose GPU.

Rel. Matteo Sonza Reorda, Luca Sterpone, Boyang Du. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2018

16 April 2019

Piattelli, Simone

A Virtual Testing Platform for Automotive Electronic Control Units.

Rel. Luca Sterpone, Boyang Du, Sarah Azimi. Politecnico di Torino, Corso di laurea magistrale in Mechatronic Engineering (Ingegneria Meccatronica), 2019

This list was generated on Sun May 19 22:24:54 2019 CEST.