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List of theses with "Urso, Teodoro as relator"

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Number of items: 3.

11 April 2025

[img] Giovanni Cascone. Weights Compression for Efficient Convolutional Neural Networks Acceleration on FPGA. Rel. Luciano Lavagno, Giovanni Brignone, Roberto Bosio, Teodoro Urso. Politecnico di Torino, Corso di laurea magistrale in Mechatronic Engineering (Ingegneria Meccatronica), 2025

25 July 2025

[img] Niccolo Cacioli. Optimizing YOLO Inference for Hardware Constraints Through Quantization Techniques. Rel. Luciano Lavagno, Teodoro Urso. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2025

24 October 2025

[img] Lorenzo Rizzo. Prototyping and Evaluation of Code Generation for CNN Acceleration on FPGAs For the AIdge ML Deployment Framework. Rel. Luciano Lavagno, Mihai Teodor Lazarescu, Roberto Bosio, Teodoro Urso. Politecnico di Torino, UNSPECIFIED, 2025

This list was generated on Thu Nov 6 20:05:43 2025 CET.