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List of theses with "Cerini, Samuele Yves as relator"

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Number of items: 2.

21 April 2023

[img] Antonio De Luca. Leveraging Deep Learning Techniques for Cross-Family Side-Channel Attacks on 8-bit Microcontrollers. Rel. Paolo Ernesto Prinetto, Samuele Yves Cerini. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2023

26 July 2024

Basilio Spinello. Data Centric Threat Model applicato a sistemi di intercettazione ambientale = Data Centric Threat Model applied to environmental interception systems. Rel. Alessandro Savino, Nicolò Maunero, Samuele Yves Cerini. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2024

This list was generated on Sat Oct 5 19:53:09 2024 CEST.