Open Hardware, Hidden Risks: Mitigating passive power side-channel leakage in RISC-V microcontrollers
Lorenzo Capobianco
Open Hardware, Hidden Risks: Mitigating passive power side-channel leakage in RISC-V microcontrollers.
Rel. Guido Masera, Mattia Mirigaldi. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2025
