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Thesis by Pesaresi, Danilo

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Thesis

[img] Danilo Pesaresi. Implementazione hardware di NTRU su FPGA = Hardware implementation of NTRU on FPGA. Rel. Guido Masera, Andrea Molino, Gabriele Coppolino. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2021

This list was generated on Mon Jul 4 22:32:49 2022 CEST.