Side-channel attacks (SCA) represent a major threat to the secure deployment of cryptographic algorithms on embedded systems, with power analysis being particularly effective in extracting sensitive information from hardware implementations. Masking techniques are among the most widely adopted countermeasures, yet fully masked designs often incur significant area and latency overhead. In this work, we present a generic side-channel protected design of Ascon, the NISTselected lightweight cryptography standard, that achieves high efficiency by dynamically reconfiguring the hardware countermeasures during message processing. Exploiting Ascon’s mode-level structure, where bulk operations can be executed without full protection, we adopt a selective masking strategy, securing only the most critical phases (initialization and finalization), while accelerating unprotected bulk processing.