Alessio Nicola
Advanced High-Level Synthesis strategies for a Logic-in-Memory exploration tool.
Rel. Maurizio Zamboni, Mariagrazia Graziano, Giovanna Turvani. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2021
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Abstract
Nowadays, von Neumann architectures are reaching limitations in performance, due to the differences in terms of technology between the Central Processing Unit (CPU) and the memory: this critical condition is known as von Neumann bottleneck. New computational paradigms are emerging to overcome the problem. Among them, the Logic-in-Memory (LiM) architectures that bring the computations inside the memory itself, minimizing data transfers between the memory and the CPU. Octantis is a High-Level Synthesis tool, introduced in its first version in 2020 and developed within the VLSI Laboratory of Politecnico di Torino, in order to support designers in the exploration and development of LiM architectures.
The program generates a Register Transfer Level (RTL) design of a LiM architecture, which implements an input algorithm described through a high-level programming language
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