25 October 2019

Hubert Couston. Verification, Identification and Elimination of parasitic structures in an integrated circuit to avoid unwanted triggering that could induce premature failure = Verification, Identification and Elimination of parasitic structures in an integrated circuit to avoid unwanted triggering that could induce premature failures. Rel. Carlo Ricciardi, Johan Bourgeat, Quentin Rafhay. Politecnico di Torino, Master of science program in Nanotechnologies For Icts, 2019