Browse by Relators
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Number of items: 4.
13 December 2024
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Lorenzo Crupi.
Specification and Implementation of a Dependable SoC Platform Based on the RISC-V Instruction Set Architecture.
Rel. Riccardo Cantoro, Matteo Sonza Reorda, Michelangelo Grosso, Dario Licastro, Iacopo Guglielminetti. Politecnico di Torino, Master of science program in Electronic Engineering, 2024
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Andrea Comberiati.
Test and Reliability Enhancement on a RISC-V SoC architecture.
Rel. Riccardo Cantoro, Matteo Sonza Reorda, Michelangelo Grosso, Iacopo Guglielminetti. Politecnico di Torino, Master of science program in Electronic Engineering, 2024
24 October 2025
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Mauro Lubrini.
Optimization of Test Architecture in RISC-V Based System-on-Chip.
Rel. Riccardo Cantoro, Michelangelo Grosso, Iacopo Guglielminetti. Politecnico di Torino, Master of science program in Electronic Engineering, 2025
27 March 2026
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Ardalan Sohrabian.
Definition and implementation of DfT infrastructure with the “shift-left” approach.
Rel. Riccardo Cantoro, Iacopo Guglielminetti, Michelangelo Grosso, David Vincenzoni. Politecnico di Torino, Master of science program in Electronic Engineering, 2026
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