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Thesis by Feraco, Biagio

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Thesis

[img] Biagio Feraco. FPGA-Based Framework for Hardware Acceleration of the HEVC Encoder. Rel. Maurizio Martina. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2018

This list was generated on Fri Aug 23 22:21:23 2019 CEST.