Tommaso Terzano
Development of an Advanced Configurable DMA System for Edge AI Accelerators in a 16nm Low Power RISC-V Microcontroller.
Rel. Luciano Lavagno, Luigi Giuffrida, Davide Schiavone. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2024
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Abstract
Artificial Intelligence has been a key driver of technological innovation over the past decade, influencing various fields, including image recognition, natural language processing, autonomous driving, and complex system modeling. Unlike traditional cloud-based solutions, Edge AI has emerged as a promising alternative. It involves processing data directly on devices, enabling real-time processing and enhancing privacy and integrity. Each edge device can simultaneously acquire data from multiple sensors, enhancing the network's ability to extract meaningful features from the surrounding environment. Microcontrollers are a popular choice for edge devices thanks to their versatility and short time-to-market. However, they present several constraints, such as limited computational resources and low-power consumption, that must be considered during deployment.
In this context, X-HEEP is a configurable, extensible, open-source RISC-V 32-bit MCU developed at the Embedded Systems Laboratory (ESL) at EPFL
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