With technology advancement in the area of transistor size, leakage consumption is becoming more and more impactful on the overall power consumption. This has prompted circuit designers to adopt low power techniques to reduce power consumption. A major concern is on cache memories, which dominate die area and are among the most power-hungry components. Some RAM memories employed in the design indeed, provide features to lower or disable temporarily the power supply, and reduce this kind of leakage consumption. During this low-leakage operating mode the memory cannot be accessed, but the data can be retained. It is important to integrate this low leakage mode without impacting too much on performances.