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Design and analysis of clocking structures for pNML technology.
Rel. Mariagrazia Graziano, Fabrizio Riente, Marco Vacca. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2021
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Abstract
For more than 30 years CMOS technology has led the electronic scenario by means of the constant scaling of transistor sizes but according to the International Technology Roadmap of Semiconductors CMOS scaling is now approaching its physical limits and economical limits. In this scenario alternative technologies are studied to overcome the limitations of charge-based technologies. One promising and interesting “Beyond CMOS” technology listed in ITRS is NanoMagnet Logic (NML). This technology offers several advantages: inherent non-volatility, radiation hardness, low power dissipation, ultra-high density data storage and processing giving new possibilities in the design of logic circuits, like the possibility to mix logic and memory in the same device.
NML uses single domain nanomagnets for logic computations
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