Alessandro Romeo
Design of an FPGA-based Testbed for accelerating Error Characterization of Product Codes.
Rel. Maurizio Martina, Guido Masera. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2020
Abstract
Error-correcting codes enable reliable and efficient data communication and storage and have become an indispensable part of information processing systems. Alongside the development of these codes, it is also essential to know how to evaluate their performance efficiently. Fast prototyping of digital communication systems needs efficient tools for the evaluation of the performance of the transmission algorithms. Since the number of parameters in a modern system can be very high the search for an optimal compromise between performance and complexity is not trivial and, simulation is generally the last tool used to perform this task. To avoid software delays inherent in a long simulation, hardware emulation is investigated.
For this reason in order to accelerate the study of Product codes this work present a modular FPGA-based testbed
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