The purpose of this thesis is to realize a circuit able to characterize Spea’s resistance measurement systems and calibrate it. Since the company’s systems must also be able to measure inside an IC, parallel programmable capacitances are placed in the final PCB. To achieve the goal, the thesis design will only cover the range 10Ωto 650 kΩin parallel to 1 nF, 10 nF, 100 nF,440 nF. In the first chapter, an introduction on measurement is given, with all the needed definitions and general rules to compute uncertainty and other statistical variables related to the measurement. In the second chapter, the board is designed.