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Algorithms Parallelization in ASIC Design

Gina Jiang

Algorithms Parallelization in ASIC Design.

Rel. Mariagrazia Graziano, Marco Vacca, Maurizio Zamboni. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2017

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Abstract:

Implementation and synthesis of algorithms Parallelization in ASIC

Relators: Mariagrazia Graziano, Marco Vacca, Maurizio Zamboni
Academic year: 2017/18
Publication type: Electronic
Number of Pages: 163
Subjects:
Corso di laurea: Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering)
Classe di laurea: New organization > Master science > LM-32 - COMPUTER SYSTEMS ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/6455
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