Mina Samadian
Restructuring Real-Time Hardware-in-the-Loop (RT HIL) Models Using a Multicore Approach: Enhancing Component Reusability and Intellectual Property Protection.
Rel. Luciano Lavagno. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2024
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Abstract
This thesis aims to restructure a real-time model for a hardware-in-the-loop (RT HIL) system incorporating an inverter, electric motor, mechanical model, and bus simulation. Hardware-in-the-loop simulation is used to develop and test complex, real-time embedded systems. It allows for integrating physical and simulated components to create a comprehensive testing environment, enabling developers to evaluate the performance and behavior of control systems under real-world conditions without the need for a complete physical prototype. This method is precious in the automotive industry for safely and efficiently testing and validating electric motor control systems and other electronic control units (ECUs). The restructuring utilizes a multi-core approach to enhance the reusability of individual components while preserving intellectual property.
The resulting model is composed of two synchronized cores: the first core is a white box, providing full access to the code for complete calibration capabilities, the addition of new parts, and comprehensive bus simulation modeling
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