polito.it
Politecnico di Torino (logo)

Design of an optimized FHOG architecture with Vivado HLS

Pietro Romeo

Design of an optimized FHOG architecture with Vivado HLS.

Rel. Maurizio Martina, Walid Walid. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2024

[img]
Preview
PDF (Tesi_di_laurea) - Tesi
Licenza: Creative Commons Attribution Non-commercial No Derivatives.

Download (10MB) | Preview
Abstract:

Object detection is one of the modern challenges in computer vision. There are many ways to detect classes of objects from static images, and most of them are based on the Histogram of Oriented Gradients (HOG) algorithm. Pixels have sharp variations at the boundary of objects, and this is exploited in HOG, where pixels’ gradients are computed to highlight such boundaries. The first step in HOG based object detection is therefore to generate a ”Feature Map”, a version of the image comprised of gradient vectors that allow to proceed with the actual object detection. The ability to process videos as well as images with HOG opens many possibilities in terms of possible applications, such as object recognition for cars, robots and so on; security footage; smart search to find sequences of interest in movies, just to name a few. Such applications are already possible with the HOG algorithm, which is however outdated and has several limitations, including being limited to a single class of objects at a time. The goal of this thesis is to provide an optimized hardware implementation on FPGA capable of executing an advanced version of the HOG algorithm, the one proposed by Felzenszwalb and his colleagues, which will be referred to as FHOG, or Felzenszwalb’s HOG. FHOG is more complex than HOG, it does not suffer from its limitations and its results are compact and easy to process. There are many software implementations for the FHOG algorithm that are capable of executing it with high precision,but so far there have been no attempts to implement the FHOG algorithm in hardware. A hardware implementation would extend the possible applications for the algorithm. This work will be useful to anyone who is seeking to implement a detection or tracking system with FHOG at its core. Since there are multiple algorithms that use FHOG, each with its own requirements, it was decided to use one of the more advanced digital design tools for this work: HLS or High Level Synthesis. By using it the result of this work is not specific to a single application, since HLS’ versatility allows to change and adapt the design with very little effort.

Relators: Maurizio Martina, Walid Walid
Academic year: 2023/24
Publication type: Electronic
Number of Pages: 61
Subjects:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/31813
Modify record (reserved for operators) Modify record (reserved for operators)