polito.it
Politecnico di Torino (logo)
Webthesis
Libraries

Reconfigurable Spiking Neural Network architecture on FPGA

Dino Santoro

Reconfigurable Spiking Neural Network architecture on FPGA.

Rel. Guido Masera, Maurizio Martina. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2020

[img]
Preview
 PDF (Tesi_di_laurea) - Tesi
Licenza: Creative Commons Attribution Non-commercial No Derivatives.
Download (4MB) | Preview
Abstract:

Advanced digital circuits for Machine Learning applications
Relators: Guido Masera, Maurizio Martina
Academic year: 2019/20
Publication type: Electronic
Number of Pages: 97
Subjects:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/14388
Modify record (reserved for operators) Modify record (reserved for operators)