Development of a Monitor IP in a Power Line Communication Modem

One of the greatest challenges of our time is the decarbonisation, for this reason the so called green mobility has gained an increasing priority on the european political plans throughout the recent years. This led the automotive industries to develop advanced Electric Vehicles (EVs) as well as dedicated Electric Vehicle Supply Equipments (EVSEs). One of the main problems related to the Electric Mobility is charging, since it is an operation that must be controlled in such a way to be sustainable and optimized. For this reason it is important to establish a communication between the MCUs of EVs and EVSEs in order to make the Smart Grid to be aware of the demand of energy and so adjust it depending on the collected information on battery status and other features. For this purpose, the ADAS and Infotainment for Automotive team of ST Microelectronics developed its own EV PLC Modem whose target is to receive and transmit data in HomePlug Green PHY (HPGP) format on the power cable and exchange them with the host processor on the device. In particular, this specific data frame format has been adopted because it is supported by all the other similar devices that are actually in commerce since it grants the desired performances paying attention to the power consumption issue. The IP is composed mainly by an HPGP subsystem unit realized for ST by an external company which is in charge of modulate and demodulate the data to and from the HPGP format and by a Digital Kernel which implements communication, security and safety units as well as a microprocessor based on a RISC-V which controls all the system. An introductory part of this thesis is dedicated to the explanation of the overall EV PLC Modem architecture and to the main concepts regarding the HPGP standard that are behind the realization of the HPGP subsystem as well as the ones that are necessary to have a complete understanding of the HPGP packet data frame. Anyway, the main target of the thesis is to present the Monitor IP, which is the last digital unit that has been integrated in the Modem to increase its level of functional safety. This IP has the role to monitor some of the signals coming from the HPGP subsystem in order to recognize possible errors that may have been occurred in the transmitted frames or in part of them during the transmission because of noise or strong attenuation, to categorize them depending on the portion of the frame that is corrupted and to rise a fail signal if the percentages of these errors over the total number of received frames exceed some given thresholds that are set in registers via software. The aspect that this thesis wants to emphasize is the entire workflow that led to the realization of the Monitor IP. As a first thing, a set of corrupted frames has been obtained by introducing strong attenuation and high level noise on a starting set of correct frames by using Matlab, then these frames have been used in a simulation environment to individuate some signals that could give information about the specific frame error. Given that signals, an initial RTL architecture of the Monitor has been implemented and then modified on the basis of the results of the synthesis on the FPGA used in the lab as a prototype. In the end, the results obtained in simulation have been confirmed by the comparison with the ones obtained from the lab test in FPGA. All of the functional steps involved in the Monitor realization can be considered as a complete example of integration of an IP in a more complex architecture