Alessandro Ciraci
Validation and test of SoC devices.
Rel. Matteo Sonza Reorda, Edgar Ernesto Sanchez Sanchez. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2018
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Abstract
Validation and test of SoC devices - Abstract Design validation and testing are two of the most important and time consuming phases of the development of a modern IC. Validation is aimed at verifying that the designed circuit doesn’t violate any requirement and it has the specified behaviour. Hardware testing is instead aimed at detecting faults in the physical die due to manufacturing defects; an important metric to judge the quality of a hardware test is the fault coverage, which is the percentage of faults detected by the test. Hence these two steps are required to ensure the proper functionality of any integrated circuit.
This thesis explores the use of a functional test, in this case a set of software applications, to perform a hardware test, analysing coverage figures on selected parts of the SoC the software is running on
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