Zeyad Mohammedmohammed Mostafa Tahoun
On Generating Timed Behavioral Models: An Investigation of Simulation Techniques.
Rel. Matteo Sonza Reorda. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2025
Abstract
The increasing complexity of modern hardware designs necessitates shifting from traditional Register-Transfer Level (RTL) abstractions to higher-level modeling approaches. One of these approaches, the Universal Specification Format (USF), based on metamodeling and embedded in the Python programming language, enables the uniform expression of digital hardware systems’ functional and temporal behavior. While USF models are inherently static, conventional hardware development heavily relies on simulation for tasks ranging from early validation and debugging to dynamic verification and virtual prototyping. To bridge the gap between static specifications and dynamic development needs, we present two standalone code generation approaches that transform USF models into executable behavioral models.
For both, this work presents their respective implementations and concludes with a detailed comparison between both in terms of performance
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