Stefano Palmieri
Testbench Continuous Reliability Study.
Rel. Renato Ferrero. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2022
Abstract
The goal of this thesis is to describe the work that I have performed in 6 months of internship, explaining the treated topic, all the analysis done on it and on its possible solutions and the final implementation. The internship takes place at Arm in Sophia-Antipolis (France), where I had the luck to work from March to August. I worked on the CPU verification side, and my team was in charge of the instruction fetch unit test bench. The complexity of the modern circuits design is growing every year, to keep pace with them functional verification has to improve and increase.
The current TBs are very large programs that are exposed to continuous changes; these changes can be place of undetected errors and bugs that can compromise the verification process
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