Nazareno Sacchi
Design Technology Co-Optimization Techniques for enabling energy-efficient Analog In-Memory Computing hardware using IGZO technology.
Rel. Gianluca Piccinini, William Fornaciari. Politecnico di Torino, Corso di laurea magistrale in Nanotechnologies For Icts (Nanotecnologie Per Le Ict), 2021
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Abstract
Due to an increasing global interest towards sustainable and intelligent nano-chips and the need to sense the world at the extreme edge, a shift in microprocessor design is requested, since Von-Neumann architectures does not give considerable gain in term of speed and energy anymore. Considering also the end of the scaling era, disruptive approaches are needed in order to make systems which are power efficient and interacts with the world. Interaction has been empowered by use of Deep Learning, a paradigm of Artificial Intelligence (A.I.) in which an algorithm is trained by data in order to make inference, that is make rules and discover patterns.
Algorithms with this function are mainly composed of affine transformations, that consist in matrix-vector multiplication (MVM) with several multiply-accumulate operation (MAC) which constitutes the main bottleneck of Deep Learning in terms of energy and delay
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