During the last decade, three-dimensional electronic devices, known as Fin field-effect transistors (FinFETs), have been developed to pursue continuous technology scaling, by improving device performance while reducing short-channel effects (SCEs). However, FinFETs are currently facing many challenges in terms of performance, layout and cost for further scaling beyond the 7-nm node. As a matter of fact, nowadays, very thin and tall fin structures would be required to maintain the benefits of such a 3D device, thus raising concerns for both performance and fabrication process. In this scenario, silicon nanosheet gate-all-around field-effect transistors (NSGAAFETs) have been recognized as excellent candidates to replace fin devices for sub-7nm nodes, due to superior channel electrostatic control and greater drive current under the same footprint.