One of the major performance obstacles for modern microprocessor architectures focused on increasing Instruction Level Parallelism are control dependencies. In particular, in all those processors characterized by a deep pipeline and a large issue width, the pressure is on the ability of branch predictors to fetch a large number of instructions from the correct execution path. An accurate predictor can reduce control dependencies and provide a smooth flow of execution. However, some branches are not easily predicted by traditional dynamic prediction techniques, which construct a history of the previous branch outcomes. Value-based branch prediction tries to correlate these hard-to-predict branches with any other architectural or execution information, in order to improve the prediction accuracy.