Security in RISC-V architectures requires hardware solutions that can guarantee reliability, integrity, and data protection. In this scenario Trusted Platform Module (TPM) and Physical Unclonable Functions (PUFs) play a primary role in the context of hardware security. Trusted Platform Module (TPM) is a dedicated security chip consolidated as building blocks to obtain a trusted root point, offering a standardized set of features that cover cryptographic key generation and protection, platform integrity measurements, and remote attestation. PUFs are unique cryptographic primitives that exploit intrinsic variations in the physical characteristics of circuits to generate answers that are distinct and cannot be replicated. The objective of this thesis is to develop a simulation TPM model for RISC-V architecture integrated into gem5.