Crosstalk in on-chip interconnects is a critical concern in modern digital systems, where aggressive scaling and dense routing aggravate capacitive coupling effects. These interactions can lead to signal integrity degradation and timing violations, particularly when adjacent wires switch in opposite directions. While traditional mitigation techniques such as shielding and spacing are effective, they often incur significant area and routing overhead. This thesis investigates an alternative approach based on encoding-decoding strategies that structurally prevent harmful switching patterns by transforming data into codewords optimized for crosstalk minimization. Several encoder configurations were proposed, including 3-to-4, 5-to-7, and 7-to-10 mappings, each applied to a full 32-bit bus implementation test case.