This work proposes and evaluates a runtime-configurable framework for RAM testing (SRAM/DRAM) in silicon validation, with a focus on transparent March tests that preserve user data. Starting from fault models and well known March U, the algorithm is refactored into a Transparent version, based on three phases: Signature Prediction (SP), Transparent March (TS), and an Additional Transparent March (AT March), while maintaining March U coverage with overall complexity O(35n). The Transparent algorithm is based on the evaluation and comparison of different signatures, that can be computed both in HW and in SW. One of the goals of this work is to estimate the impact of the SW signature computation proposing an efficient HW implementation.