Diego Ricardo Bueno Pacheco
Efficient Tiling Architecture for Scalable CNN Inference: Leveraging High-Level Design and Embedded Scalable Platform (ESP).
Rel. Mario Roberto Casu, Luca Urbinati. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2023
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Abstract
High-Level Design of Hardware Accelerators of Typical DNN LIn recent years, Convolutional Neural Networks (CNNs) have gained significant prominence across a multitude of computer vision and deep learning applications, driving notable advancements in fields such as image classification, object detection, face recognition, and medical imaging. As the demand for deep learning and computer vision applications continues to rise, the pressing need for more efficient and scalable solutions to meet the computational demands of cutting-edge CNN models becomes increasingly evident. Furthermore, the necessity of extending these applications to a broader range of devices, without relying on cloud solutions, has led to a shift in computation from cloud servers to edge devices.
However, this transition presents a formidable challenge due to the limited computational and memory resources inherent in edge devices
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