Due to the complex nature of the constraints and objectives involved, developing Analog and Mixed Signal (AMS) Circuits is still mainly a manual process, and existing Electronic Design Automation (EDA) tools are still limited in their capabilities or restricted to a few specific steps. However, recent developments in AI have opened up novel prospects for automating AMS design procedures. Specifically, identifying circuit topologies within a netlist is a crucial aspect of AMS EDA, as certain circuit structures necessitate specific constraints, for example, in terms of their placement on the layout (e.g., symmetry, matching, etc.). Traditionally, topology recognition has relied on subgraph isomorphism algorithms like VF2.