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Graph Neural Networks for Topology Recognition of AMS Integrated Circuits

Aurelio Teliti

Graph Neural Networks for Topology Recognition of AMS Integrated Circuits.

Rel. Daniele Jahier Pagliari. Politecnico di Torino, Corso di laurea magistrale in Mechatronic Engineering (Ingegneria Meccatronica), 2023

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Due to the complex nature of the constraints and objectives involved, developing Analog and Mixed Signal (AMS) Circuits is still mainly a manual process, and existing Electronic Design Automation (EDA) tools are still limited in their capabilities or restricted to a few specific steps. However, recent developments in AI have opened up novel prospects for automating AMS design procedures. Specifically, identifying circuit topologies within a netlist is a crucial aspect of AMS EDA, as certain circuit structures necessitate specific constraints, for example, in terms of their placement on the layout (e.g., symmetry, matching, etc.). Traditionally, topology recognition has relied on subgraph isomorphism algorithms like VF2. Unfortunately, these methods suffer from long execution times when applied to large netlists. The objective of this thesis is to create an AI-driven pipeline for topology recognition capable of achieving both high accuracy and a reduction in computational time compared to the previous methods, like VF2. The proposed pipeline is composed of three phases. An initial pre-processing refines and prepares the dataset, enhancing the quality and relevance of the input data. In order to do so, this process removes all information not relevant to topology recognition. The central part of the pipeline consists of a Graph Neural Network (GNN). The GNN receives as input a bipartite graph that comprises two distinct sets of nodes. One set encompasses the various devices within the circuit, such as transistors, while the other encapsulates the network connections, or nets, that link these devices together. The bipartite graph's ability to maintain the relationships between devices provides the GNN with a comprehensive view of the circuit. The GNN then learns the patterns within the circuit that correspond to different topologies. Lastly, in the third stage, post-processing is executed, in which the outcomes generated by the GNN undergo further refinement using the VF2 algorithm. This combined approach leverages the strengths of both the GNN and VF2, resulting in a topology recognition process that is both robust and accurate. To assess the effectiveness of this pipeline, the thesis undertakes a comparative analysis among three scenarios: utilizing the GNN in isolation, combining the GNN with VF2, and employing VF2 as a standalone tool. This comprehensive evaluation offers valuable insights into the capabilities of the entire pipeline. The obtained results, conducted on a graph with roughly 700,000 nodes, demonstrate the excellent performance of the solution compared to the VF2 algorithm. The accuracy is the same for both solutions, 0.9999. However, precision has improved from 0.9641 (VF2 algorithm) to 0.9662 (GNN + VF2), while recall has slightly decreased from 0.9860 (VF2 algorithm) to 0.9808 (GNN + VF2). The most significant results were achieved in terms of computational time, which decreased from an average of 10 hours and 54 minutes to an average of 1 minute and 57 seconds.

Relators: Daniele Jahier Pagliari
Academic year: 2023/24
Publication type: Electronic
Number of Pages: 74
Corso di laurea: Corso di laurea magistrale in Mechatronic Engineering (Ingegneria Meccatronica)
Classe di laurea: New organization > Master science > LM-25 - AUTOMATION ENGINEERING
Aziende collaboratrici: Politecnico di Torino
URI: http://webthesis.biblio.polito.it/id/eprint/28628
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