Enrico Monfrino, Roberto Poma
3D Silicon-based Tunnel FET technology: fabrication process and electrical TCAD simulations.
Rel. Gianluca Piccinini, Fabrizio Mo, Chiara Elfi Spano. Politecnico di Torino, Corso di laurea magistrale in Nanotechnologies For Icts (Nanotecnologie Per Le Ict), 2023
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Abstract
MOSFET devices represented the basis of the electronics, but in the last years the scaling of the dimensions required by the technology caused the appearance of some problems, such as short channel effects and power dissipation. To overcome these drawbacks differ- ent solutions are possible and one of them is to change the nature of the device to TFET. Thanks to different conduction mechanism (tunneling) several advantages can be achieved; the most relevant are lower off-current, and so lower power dissipation, and smaller sub- threshold swing. In this thesis the design and the analysis of TFET devices are discussed through the use of the software Synopsys TCAD Sentaurus, by simulating realistic fabrication processes.
The purpose is to investigate structures based on homojunctions and materials commonly used in the production of traditional MOSFET
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