Analysis of side-channel leakages on cryptographic circuits

The security of cryptosystems is usually evaluated using a black-box approach; an adver- sary can access the algorithm only through predefined interfaces, such as the inputs and outputs of the system. In order to be used, those cryptosystems have to be implemented onto a physical circuit. This opens up the possibility for attackers, to use so-called side channels, to obtain additional information about the internal computation of the systems, that are leaked by the circuit. A specific type of Side Channel Attacks (SCA) are Power Analysis Attacks (PAA); using PAA the attacker obtains details about the internal cal- culations performed by the circuit, analyzing its power consumption. These information are then used to retrieve the secret key. The goal of this thesis, is to generate a tool, which can analyse the weakness of a circuit towards PAA, as realistically as possible. The developed tool, called VoLPE (Verification of Leakages Propagation Escalation), does that, by simulating a synthesized circuit, ob- tained from OpenLane, and calculating the existing correlation, between the inputs and a model describing the power consumption of the circuit. We start this work by giving the necessary background information, proceeding then with a detailed description of the developed tool. We conclude by outlining the tests we performed on some sample circuits, and analyzing the obtained results.