Nowadays, quantum algorithms are designed using an idealised high-level quantum circuit description without considering the quantum hardware characteristic. Unfortunately, in the contemporary Noisy Intermediate-Scale Quantum (NISQ) computer era, the execution on real devices strongly depends on the physical properties of the backend. Quantum compilation toolchains aim to refine the original quantum circuit description, making it executable on the target hardware while optimising some desired figure of merits. This process is composed of two steps: the logic synthesis, decomposing the original circuit using the target technology native gates, and the layout synthesis, solving the coupling-constraints of the target NISQ device, due to the hardware limitations.