Coralie Marie Allioux
Logic-In-Memory implementation on FPGA.
Rel. Mariagrazia Graziano, Massimo Ruo Roch, Giovanna Turvani. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2022
|
Preview |
PDF (Tesi_di_laurea)
- Tesi
Licenza: Creative Commons Attribution Non-commercial No Derivatives. Download (19MB) | Preview |
Abstract
Nowadays, the Von Neumann architecture is the most used for microprocessors. This architecture comprises two main components: the processing unit and the memory. However, it introduces the memory bottleneck problem due to the huge difference of performance: modern processing units are incredibly faster than memories, requiring a considerable amount of energy and time to transfer the data between those two entities. Recently, the Logic-in-Memory (LiM) has been widely studied in the literature, aiming at solving this bottleneck. This paradigm merges the processing unit and the memory by placing directly some logic circuits inside or near the memory, consequently lowering the data exchange between those components and drastically reducing energy and time.
In this thesis, a specific LiM implementation on FPGA of the XNOR-net, a bitwise convolutional neural network, is presented
Relatori
Anno Accademico
Tipo di pubblicazione
Numero di pagine
Corso di laurea
Classe di laurea
Aziende collaboratrici
URI
![]() |
Modifica (riservato agli operatori) |
