Design of a high-speed data buffer based on DDR memories for real-time processing of hyperspectral data and its implementation in a radiation-tolerant FPGA

Laura Chisciotti

Design of a high-speed data buffer based on DDR memories for real-time processing of hyperspectral data and its implementation in a radiation-tolerant FPGA.

Rel. Guido Masera, Davide Fiorini. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2022

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Abstract

In the space environment, during the image acquisition, the hyperspectral payloads need to process a data flow, which could swing between hundreds of Mbit/sec and some Gbit/sec. In this scenario, one of the key aspects is to find the correct dimension of the memory buffers, based on access speed and dimension, in order to optimize the payload and guarantee the time allocation of the whole sequence of tasks, which have to be executed between the rough data sending by the detector and the moment in which the processed data are sent to the platform. The hyperspectral payload called CHIME (Copernicus Hyperspectral Imaging Mission for the Environment), implemented by the Leonardo S.p.A.

for the European Space Agency (ESA), needs to access a high-speed buffer concurrently in order to memorize the data coming from the detector, execute a spectral editing/binning, fix bad pixels, apply some coefficients to obtain a linear calibration of their radiometric value and read again the data, grouping them in homogeneous packages before shipping them towards the mass memory of the satellite