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Gabriele Borello


Rel. Guido Masera, Alberto Dassatti. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2021

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Today the volume of data generated is constantly increasing. Each year it grows by 27%, reaching 94 Zettabytes in 2021, according to the International Data Group. As this amount increases, the bottleneck due to the transfer of data from where it is stored to where it is processed is increasingly evident. One of the possibilities to overcome this obstacle is Computational Storage, able to modify the old paradigm "Data move to process" in the new "Move process near data". The following work describes the birth of a Computational Storage (Fixed Computational Storage Service), based on the NVMe protocol, built on FPGA, able to lighten the computational weight of the Host by exploiting the peer-to-peer capabilities of PCI-Express. First of all, the realization of an NVMe Controller is described, based on NVM Express Base Specification version 1.4, capable of managing communication and data transfer between Host and storage device. Once the software was tested via QEMU, it was then transferred to the ARM of an FPGA, and the performance was compared with a real storage device (Samsung’s SmartSSD). It was subsequently transformed into computational storage following the draft protocol for such devices presented by SNIA, using a CMB as a buffer for data processing. Through the SPDK software, it was possible to test the correct functioning of the device and evaluate its performance.

Relators: Guido Masera, Alberto Dassatti
Academic year: 2021/22
Publication type: Electronic
Number of Pages: 101
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: HEIG-VD
URI: http://webthesis.biblio.polito.it/id/eprint/20460
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