Deep Neural Networks (DNNs) have become the most widely used computational model in the majority of Machine Learning (ML) applications due to the incredible level of accuracy achievable. This result is obtained at the cost of an elevated computational complexity and high memory demand both for training and inference processing, making DNN implementations on systems with a limited amount of resources and stringent energy consumption constrains a challenging task. To address this challenge, exploiting the large amount of parallelism exhibited by such networks represents the solution to optimize the execution of Deep Learning (DL) algorithms. This has motivated over time the development of dedicated accelerators based on different hardware platforms capable of making DNN inference processing at the edge efficient in terms of both latency and energy efficiency.