Esplorazione di architetture per computazione in memoria per circuiti ibridi basati su CMOS e tecnologie emergenti. = Exploration of logic-in-memory architectures for hybrid CMOS/Emerging Technologies circuits. - WebThesis

WebThesis

Esplorazione di architetture per computazione in memoria per circuiti ibridi basati su CMOS e tecnologie emergenti. = Exploration of logic-in-memory architectures for hybrid CMOS/Emerging Technologies circuits.

Michele Bianco

Esplorazione di architetture per computazione in memoria per circuiti ibridi basati su CMOS e tecnologie emergenti. = Exploration of logic-in-memory architectures for hybrid CMOS/Emerging Technologies circuits.

Rel. Marco Vacca, Maurizio Zamboni, Mariagrazia Graziano. Politecnico di Torino, Master of science program in Electronic Engineering, 2020

Preview	PDF (Tesi_di_laurea) - Thesis Licence: Creative Commons Attribution Non-commercial No Derivatives. Download (2MB) \| Preview
	Archive (ZIP) (Documenti_allegati) - Other Licence: Creative Commons Attribution Non-commercial No Derivatives. Download (37kB)

Abstract

Exploration of hybrid CMOS-MTJ-PNML logic-in-memory architectures

Relators

Marco Vacca, Maurizio Zamboni, Mariagrazia Graziano

Academic year

2020/21

Publication type

Electronic

Number of Pages

111

Course of studies

Master of science program in Electronic Engineering

Classe di laurea

New organization > Master science > LM-29 - ELECTRONIC ENGINEERING

URI

https://webthesis.biblio.polito.it/id/eprint/16774

Modify record (reserved for operators)

Modify record (reserved for operators)