Esplorazione di architetture per computazione in memoria per circuiti ibridi basati su CMOS e tecnologie emergenti = Exploration of logic-in-memory architectures for hybrid CMOS/Emerging Technologies circuits

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Esplorazione di architetture per computazione in memoria per circuiti ibridi basati su CMOS e tecnologie emergenti = Exploration of logic-in-memory architectures for hybrid CMOS/Emerging Technologies circuits.

Rel. Marco Vacca, Maurizio Zamboni, Mariagrazia Graziano. Politecnico di Torino, Master of science program in Electronic Engineering, 2020

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Abstract

Exploration of hybrid CMOS-MTJ-PNML logic-in-memory architectures

Relators

Marco Vacca, Maurizio Zamboni, Mariagrazia Graziano

Publication type

Electronic

URI

https://webthesis.biblio.polito.it/id/eprint/16774

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