Eleonora Ferrara
Hardware Accelerator Sparsity Based for Ultra-Low Power Quantized Neural Networks based on Serial Multipliers.
Rel. Maurizio Martina. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2020
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Abstract
Bit-Serial Multiplier Sparsity Based for an Hardware Accelerator Nowadays, applications such as Deep Learning Enabled Internet of Things have become a new way to look to the future of monitoring, control and automation of the reality around us. In this thesis, the focus is on Edge Computing IoT, that pushes the analytic part from servers to sensors and portable devices by cutting off the need for data transmission and broad bandwidth. However, a problem has to be fixed in order to get the possibility to employ this new technology in whatever application from Industry 4.0 to medical devices, from smart home to smart cities and so on.
This important issue is the huge power consuming that this kind of applications requires
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