Giuseppe Carnicelli
Low latency bus-based solution for inter-processor communication.
Rel. Guido Masera. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2020
Abstract
Digital electronic devices, like smartphones, smartwatches, video game consoles typically contain one or more System on Chip (SoC) that are composed by many components such as processors, memories, control units. The increasing demand of data processing increased the number of processors that communicate in a SoC, so the complexity problem is becoming important.\\ Components on a SoC are connected through an on-chip communication architecture. Different SoC communications have a different impact on the performances, power consumption, cost, design time, area and latency. For example, today a smartphone can contain many different sensors like GPS, more than one camera, gyroscope, accelerometer etc.).\\ Moreover, with the spread of the new 5g protocol communication, the Internet of Things (IoT) field and the automotive fields are exploding with an increasing number of sensor connected in networks that are in charge to exchange data in a real time domain.
A critical parameter is the data latency and it is due to the high demand of embedded sensors in a specific device
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