In this thesis, it will be described what is a PPA analysis and how it is possible to perform it, starting from introducing the investigated parameters and the basic information required. Subsequently, it will be explained how to integrate a third party IP core in Qualcomm's flow together with other components and enable the synthesis. Having generated gate-level netlist, the results obtained with one of the most recent technology nodes will be reported and they will be compared with each other. The synthesis runs will be run integrating Qualcomm's component in a different way, and thus the netlist will present significant variations.