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Walid Walid


Rel. Maurizio Martina, Guido Masera. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2019

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Real-time on field scale estimation of a target with accuracy is a research problem in visual tracking. Itis important due to its applications in domains like surveillance, robotics and automation. In general,only the initial position of the object is known, and the trajectory of the object motion is desired tobe traced. It becomes further difficult due to problems like fast motion of the objects, motion blur,size and scale variations. Existing algorithms estimate the size of target based on exhaustive scalesearch which faces problems when scale varies a lot and involves expensive computation. They learnsize or appearance model of target by using generative or discriminative approach. This model is thenutilized to estimate the state target in a new frame. Typically, the model is evaluated at multipleresolutions by an exhaustive scale search, hence computationally expensive. To tackle these problems, we used an algorithm which relies on online explicit filtering basedtarget sampling at different scales. This proposes an alternative, discriminative approach for scaleadaptive visual tracking. Separate scale filters are used for scale estimation and translation by Dis-criminative Scale Space Tracker (DSST). To reduce the computational cost Fast Fourier Transform(FFT) and pointwise operations are used, hence the fast Discriminative Scale Space Tracker (fDSST)is developed. This thesis aims at FPGA or hardware based implementation of fast discriminative scale spacetracking algorithm. FPGAs are used for many DSP applications. They are fast prototyping devicesfor real-time applications. The hardware created on FPGA will be fast and use resources to a min-imum to decrease the cost and will be optimized based on different matrices like performance-cost,power-performance and cost-power etc. For this purpose, the major mathematical blocks in this algorithm are studied and their bestimplementation approach for this algorithm is described. The best implementation approach is givenin terms of the complexity and dimensions of inputs involve, less area and fast operation. The wholealgorithm is also depicted with the step by step operations involved, to better understand the de-cisions. The implementation strategies and the implemented blocks are implemented in VIVADOHLS tool, which is a tool for high level synthesis. It is suggested to keep the area of target imageat maximum, half of the frame size for good performance. Also, the synthesized version of DiscreteFourier Transform hardware is depicted with simulating on real image data.

Relators: Maurizio Martina, Guido Masera
Academic year: 2019/20
Publication type: Electronic
Number of Pages: 89
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: Politecnico di Torino
URI: http://webthesis.biblio.polito.it/id/eprint/12559
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