Francesco Franco
Evaluating basic building blocks needed to build FPGA fabrics from memristors.
Rel. Luciano Lavagno, Dirk Koch. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2019
Abstract
Nowadays, semiconductor industries are facing difficulty to follow Moore's law, which predicts that the numbers of transistors are doubled every 18 months. The primary benefits were an increment of the performance and a reduction of the cost per transistor. However, CMOS scaling is encountering problems to shrink devices below 28 nm, because the cost per transistor is no longer decreasing. Moreover, the performance boost that was guaranteed from the scaling process has essentially stopped for about a decade. Nevertheless, the need for computational power is increasing. Currently, the computational demands are grown in application fields such as machine learning and bio-inspired computer.
These require massively parallel computation and may adopt FPGA accelerators
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