VLSI architecture of a Multiple-Error-Correction Polar-Codes decoder - WebThesis

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VLSI architecture of a Multiple-Error-Correction Polar-Codes decoder

Nicola Antonio Travaglini

VLSI architecture of a Multiple-Error-Correction Polar-Codes decoder.

Rel. Maurizio Martina, Guido Masera. Politecnico di Torino, Master of science program in Electronic Engineering, 2019

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Relators

Maurizio Martina, Guido Masera

Academic year

2018/19

Publication type

Electronic

Number of Pages

81

Course of studies

Master of science program in Electronic Engineering

Classe di laurea

New organization > Master science > LM-29 - ELECTRONIC ENGINEERING

URI

https://webthesis.biblio.polito.it/id/eprint/11028

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